Article: 92 of comp.sys.cdc
Reply-To: "Douglas H. Quebbeman" <dhquebbeman@theestopinalgroup.com>
From: "Douglas H. Quebbeman" <dhquebbeman@theestopinalgroup.com>
Newsgroups: comp.sys.cdc
Subject: CDC 8600 Instruction Set
Date: Thu, 14 Jun 2001 07:53:32 -0400
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Xref: archive.mv.meer.net comp.sys.cdc:92

The CDC 8600 design came along pretty far. I'd been
assuming that what the Chippewa Falls Museum of Industry
and Technology is calling a prototype was actually just
a moock-up, but it may have indeed worked. They at least
had a simulator for the design.

Here is the instruction set for the 8600:

00                      Error Stop
01      BXj     Xj*Xk   Logical product
02      BXj     Xj+Xk   Logical sum
03      BXj     Xj-Xk   Logical Difference
04      BXj     Xk      Copy
05      BXj     -Xk     Complement
06      LXj     Xj      Shift (Xj) left/right by (Xk)
07      AXj     Xk      Shift (Xj) right/left by (Xk)
08      DXj     Xj+Xk   DP SUM
09      DXJ     Xj-Xk   DP difference
0A      IV      Xj,Xk   Reciprocal approximation of (Xk) to (Xj)
0B      CXj     Xk      Population Count
0C      DXj     Xj*Xk   DP Product
0D      RI      Xj,Xk   Reciprocal Iteration of (Xj)*(Xk)
0E      IXj     Xj*Xk   Integer product
0F      NO              Nop
10      SXj     k       Put k in Xj
11      SXj     -k      Put -k in Xj
12      SXj     Xj+k    (Xj)+k to Xj
13      SXj     Xj-k    (Xj)-k to Xj
14      UXk     Xj      Unpack coefficient
15      EXk     Xj      Unpack exponent
16      PXk     Xj,Xk   Pack Coefficient & exponent
17      IXj     -Xk     Integer difference - (Xk)
18      SC              Begin System call
19      EC              End System call
1A      IB      Xk,Xj   Block input chanel (Xj) to address (Xk)
1B      OB      Xk,Xj   Block output channel (Xj) from (Xk)
1C      CXj             Read channel request to Xj
1D      XA      Xk      Enter XA from Xk
1E      ZXj     Xk      Count number of leading zeroes in (Xk)
1F      OXj     Xk      Count number of leading ones in (Xk)
20      WXj     Q       Write (Xj) to memory at Q
21      WXj     Xk      Write (Xj) to memory at (Xk)
22      XXj     Q       Exchange (Xj) with memory at Q
23      XXj     Xk      Exchange (Xj) with memory at (Xk)
24      RXj     Q       Read memory at Q to Xj
25      RXj     Xk      Read memory at (Xk) to Xj
26      RXj*    Q       Read memory at abs address Q
27      RXj*    Xk      Read memory at abs address (Xk)
28      RXj+    Q       Read memory at (P+Q) to XJ
29      IXj*    Q       Load (P)+Q to Xj
2A      IXj     Q       Load Q to Xj
2B      XXk             Read XA to Xk
2C      SF      Xk      Set interlock flags from Xk
2D      CF      Xk      Clear interlock flags from Xk
2E      FXj             Read interlock register to Xj
2F      TXj             Read internal clock to Xj
30      JP      Q       Jump to P+Q
31      JXj     Q       Set (Xj) = P & jump to P+Q
32      IR      Xj,Q    Branch to P+Q if (Xj) in range
33      OR      Xj,Q    Branch to P+Q if (Xj) not in range
34      ZR      Xj,Q    Branch to P+Q if (Xj) = 0
35      NZ      Xj,Q    Branch to P+Q if (Xj) != 0
36      PL      Xj,Q    Branch to P+Q if (Xj) is positive
37      NG      Xj,Q    Branch to P+Q if (Xj) is negative
38      JXj*    Q       Set (Xj) = P and jump to Q
39      JXj     Xk      Set (Xj) = P and jump to (Xk)
3A      JXj-    Q       Set (xj) = P and jump to abs addr Q
3B      JXj-    Xk      Set (Xj) = P and jump to abs addr (Xk)
3C      JP      Xj+k    Jump to (Xj) + k
3D      JP+     Xj+k    Jump to (Xj)+k and set prf?
3E      JP*     Q       Jump to Q
3F      XJ              Exchange exit
40      MXj     k       Clear all but lower k bits of Xj
44      MXj     -k      Clear lower k bits of Xj
48      LXj     k       Left shift (Xj) by k
4C      AXj     k       Right shift (Xj) by k
5x      IXi     Xj+Q    Integer sum of (Xj)+Q to Xi
6x      IXi     Xj+Xk   Integer sum of (Xj)+(Xk) to Xi
7x      IXi     Xj-Xk   Integer diff of (Xj)-(Xk) to Xi
8x      FXi     Xj+Xk   Float sum of (Xj)+(Xk) to Xi
9x      FXi     Xj-Xk   Float diff of (Xj)-(Xk) to Xi
Ax      FXi     Xj*Xk   Float prod of (Xj)*(Xk) to Xi
Bx      LT      Xj,Xk,Q Branch backward i words if (Xj)<(Xk)
Cx      RXi     Xj+Q    Read memory at (Xj)+Q
Dx      RXi     Xj+Xk   Read memory at (Xj) + (Xk)
Ex      WXi     Xj+Q    Write to memory at (Xj)+Q
Fx      WXi     Xj+Xk   Write to memory at (Xj) + (Xk)


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