Article 25416 of comp.sys.sun.hardware: Path: mri.com!news.aimnet.com!news.exodus.net!news1.best.com!nntp.primenet.com!news.mathworks.com!newsfeed.internetmci.com!in2.uu.net!news.tcom.co.uk!morse.ukonline.co.uk!bath.ac.uk!bsmail!warwick!lyra.csx.cam.ac.uk!sunsite.doc.ic.ac.uk!dundee.ac.uk!usenet From: Peter Clinch Newsgroups: comp.sys.sun.hardware Subject: Re: SPARC clock rate Date: Mon, 10 Jun 1996 14:30:34 +0100 Organization: The University, Dundee, DD1 4HN, Scotland, UK. Lines: 66 Message-ID: <31BC237A.4EBD@dundee.ac.uk> References: <4ph1no$96t@neptune.ethz.ch> NNTP-Posting-Host: tigger.dundee.ac.uk Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-Mailer: Mozilla 3.0b4 (X11; I; SunOS 5.5 sun4m) Giovanni Cesari wrote: > For ex. on a SPARC 10 I get the following answer: > > > Does it mean that the clock rate is only 36 MHz ? Yes, that'll be a SPARC 10 model 30. A single SuperSPARC chip running at 36 MHz with no extra cache. If the model is postfixed by a '1' (e.g., 41), that means there's 1 Mb external cache to the processor. A trailing 2 or 4 (e.g., 502) means 2 or 4 processors. Thus: 30 1 36Mhz SuperSPARC, no external cache 40 1 40Mhz SuperSPARC, no external cache 41 1 40Mhz SuperSPARC, 1Mb external cache 50 1 50Mhz SuperSPARC, no external cache 502 2 50Mhz SuperSPARC, no external cache 51 1 50Mhz SuperSPARC, 1Mb external cache 512 2 50Mhz SuperSPARC, 1Mb external cache each 514 4 50Mhz SuperSPARC, 1Mb external cache each 61 1 60Mhz SuperSPARC, 1Mb external cache 612 2 60Mhz SuperSPARC, 1Mb external cache each 71 1 75Mhz SuperSPARC, 1Mb external cache 712 2 75Mhz SuperSPARC, 1Mb external cache each > The message I get from a SPARC 5 is much clearer: > > A SPARC-based CPU is available. > CPU's clock rate appears to be approximately 72.1 MHz. > Kernel says the CPU's clock rate should be 70.0 MHz. > > Sun-4 floating-point controller version 4 found. > Sorry, fpversion cannot recognize the FPU in this system. > > Hostid = 0x8035C3E6. > > Here the clock is 70 MHz. > > What is strange is that the performances on both machines are the same. > What am I missing ?? Ah, but it isn't strange at all, since SPARC 10s generally run SuperSPARC chips (they can also run HyperSPARCs) and SPARC 5 runs the MicroSPARC chip, which will have a lower performance than a Super *at the same clock rate*. Super will also outperform the same clock rate of a Hyper, but that doesn't help you much since Hypers run at higher clock rates anyway, generally 90 to 150 MHz at present. The 150 MHz. Hyper is currently about the top performance generally available chip for a SPARC 10, but higher performance ones are sampling and should ship soon. And of course Ultras use SPARC chips too, but UltraSPARC types which are considerably zippier than Micro, Super, Hyper and just plain old vanilla SPARC: an UltraSPARC at 140 MHz will blow away a 150 MHz. SuperSPARC. Also available are HAL's SPARC64 v9 implementations, though I'm not sure where they fit in relative to the Ultras for a given clock rate. Pete. -- Peter Clinch Dundee University & Teaching Hospitals Tel 44 1382 660111 ext. 3637 Medical Physics, Ninewells Hospital Fax 44 1382 640177 Dundee DD1 9SY Scotland UK net p.j.clinch@dundee.ac.uk http://www.dundee.ac.uk/MedPhys/